Towards the Automatic Transformation of the SIMULINK Model into an FPGA-in-Loop System and its Real-Time Simulation

Information is a key component of progress. Industry 4.0, and especially the future Industry 5.0, is closely related to the topic of the Digital Twin, where virtual components interact with each other. The main advantage of such a system is that it can fully mimic the behaviour of the complicated system, including various unexpected perturbations such as noise, jitter, delays, etc. Thus, the ability to create complex models and run them in real-time is a basic need for extending the Digital Twin. One of the major problems in the development of digital twins is the increasing complexity of the models. Therefore, large processing capacities and parallel computation become critical. The field-programmable gate array (FPGA) is a type of hardware that best fits this task. The FPGA-in-the-loop (FiL) can be considered as the <italic>container</italic> for running the Digital-Twin model. The transformation of a digital model into FiL is known and used by many companies at this time. However, the authors found that there are no publicly available model-to-FiL transformation methods. In this paper, the authors aim to fill this gap. We first discuss the major design challenges of a FiL system and provide recommendations to overcome them in the form of a road map. We then demonstrate a step-by-step process for converting a simple MATLAB/SIMULINK model to a FiL system using the proposed road map. Finally, we will demonstrate the validation process of the designed FiL systems and prove that they are running in real-time.