Process Integration and Reliability of Wafer Level SLID Bonding for Poly-Si TSV capped MEMS

Vesa Vuorinen; Glenn Ross; Heikki Viljanen; James Decker; Mervi Paulasto-Krockel

doi:10.1109/ESTC.2018.8546398

Process Integration and Reliability of Wafer Level SLID Bonding for Poly-Si TSV capped MEMS

Vesa Vuorinen, Glenn Ross, Heikki Viljanen, James Decker, Mervi Paulasto-Krockel

VTT Technical Research Centre of Finland Ltd.

Tutkimustuotos: Artikkeli kirjassa/konferenssijulkaisussa › Conference contribution › Scientific › vertaisarvioitu

3 Sitaatiot (Scopus)

405 Lataukset (Pure)

Abstrakti

The objective of this study was to develop a fully integrated process for wafer level MEMS packaging utilizing PolySi through silicon via (TSV) capped MEMS devices. First, interconnection metallurgy and Solid Liquid Interdiffusion (SLID) bonding process was optimized. Then sc.'vias before bonding' capping process and contact metallizations for Poly-Si TSVs were developed. Finally, the process integration was demonstrated by using piezoelectrically driven MEMSactuators. However, several design and manufacturing related challenges were observed and detailed failure analysis were carried out to resolve these problems.

Alkuperäiskieli	Englanti
Otsikko	Proceedings of the 2018 7th Electronic System-Integration Technology Conference, ESTC 2018
Kustantaja	IEEE
Sivumäärä	6
ISBN (elektroninen)	9781538668139
DOI - pysyväislinkit	https://doi.org/10.1109/ESTC.2018.8546398
Tila	Julkaistu - 26 marrask. 2018
OKM-julkaisutyyppi	A4 Artikkeli konferenssijulkaisuussa
Tapahtuma	Electronic System Integration Technology Conference - Dresden, Saksa Kesto: 18 syysk. 2018 → 21 syysk. 2018 Konferenssinumero: 7

Conference

Conference	Electronic System Integration Technology Conference
Lyhennettä	ESTC
Maa/Alue	Saksa
Kaupunki	Dresden
Ajanjakso	18/09/2018 → 21/09/2018

Pääsy asiakirjaan

10.1109/ESTC.2018.8546398

ELEC_Vuorinen_etal_Process-Integration-and-Reliability_ESTC_2018Final published version, 800 KB

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@inproceedings{cddcec3d74334b3eb06314eec613d1ad,

title = "Process Integration and Reliability of Wafer Level SLID Bonding for Poly-Si TSV capped MEMS",

abstract = "The objective of this study was to develop a fully integrated process for wafer level MEMS packaging utilizing PolySi through silicon via (TSV) capped MEMS devices. First, interconnection metallurgy and Solid Liquid Interdiffusion (SLID) bonding process was optimized. Then sc.'vias before bonding' capping process and contact metallizations for Poly-Si TSVs were developed. Finally, the process integration was demonstrated by using piezoelectrically driven MEMSactuators. However, several design and manufacturing related challenges were observed and detailed failure analysis were carried out to resolve these problems.",

keywords = "MEMS, Process integration, Reliability, Wafer level SLID bonding",

author = "Vesa Vuorinen and Glenn Ross and Heikki Viljanen and James Decker and Mervi Paulasto-Krockel",

year = "2018",

month = nov,

day = "26",

doi = "10.1109/ESTC.2018.8546398",

language = "English",

booktitle = "Proceedings of the 2018 7th Electronic System-Integration Technology Conference, ESTC 2018",

publisher = "IEEE",

address = "United States",

note = "Electronic System Integration Technology Conference, ESTC ; Conference date: 18-09-2018 Through 21-09-2018",

}

Vuorinen, V , Ross, G, Viljanen, H, Decker, J & Paulasto-Krockel, M 2018, Process Integration and Reliability of Wafer Level SLID Bonding for Poly-Si TSV capped MEMS. julkaisussa Proceedings of the 2018 7th Electronic System-Integration Technology Conference, ESTC 2018., 8546398, IEEE, Electronic System Integration Technology Conference, Dresden, Saxony, Saksa, 18/09/2018. https://doi.org/10.1109/ESTC.2018.8546398

Process Integration and Reliability of Wafer Level SLID Bonding for Poly-Si TSV capped MEMS. / Vuorinen, Vesa ; Ross, Glenn; Viljanen, Heikki et al.

Proceedings of the 2018 7th Electronic System-Integration Technology Conference, ESTC 2018. IEEE, 2018. 8546398.

Tutkimustuotos: Artikkeli kirjassa/konferenssijulkaisussa › Conference contribution › Scientific › vertaisarvioitu

TY - GEN

T1 - Process Integration and Reliability of Wafer Level SLID Bonding for Poly-Si TSV capped MEMS

AU - Vuorinen, Vesa

AU - Ross, Glenn

AU - Viljanen, Heikki

AU - Decker, James

AU - Paulasto-Krockel, Mervi

N1 - Conference code: 7

PY - 2018/11/26

Y1 - 2018/11/26

N2 - The objective of this study was to develop a fully integrated process for wafer level MEMS packaging utilizing PolySi through silicon via (TSV) capped MEMS devices. First, interconnection metallurgy and Solid Liquid Interdiffusion (SLID) bonding process was optimized. Then sc.'vias before bonding' capping process and contact metallizations for Poly-Si TSVs were developed. Finally, the process integration was demonstrated by using piezoelectrically driven MEMSactuators. However, several design and manufacturing related challenges were observed and detailed failure analysis were carried out to resolve these problems.

AB - The objective of this study was to develop a fully integrated process for wafer level MEMS packaging utilizing PolySi through silicon via (TSV) capped MEMS devices. First, interconnection metallurgy and Solid Liquid Interdiffusion (SLID) bonding process was optimized. Then sc.'vias before bonding' capping process and contact metallizations for Poly-Si TSVs were developed. Finally, the process integration was demonstrated by using piezoelectrically driven MEMSactuators. However, several design and manufacturing related challenges were observed and detailed failure analysis were carried out to resolve these problems.

KW - MEMS

KW - Process integration

KW - Reliability

KW - Wafer level SLID bonding

UR - http://www.scopus.com/inward/record.url?scp=85060057433&partnerID=8YFLogxK

U2 - 10.1109/ESTC.2018.8546398

DO - 10.1109/ESTC.2018.8546398

M3 - Conference contribution

AN - SCOPUS:85060057433

BT - Proceedings of the 2018 7th Electronic System-Integration Technology Conference, ESTC 2018

PB - IEEE

T2 - Electronic System Integration Technology Conference

Y2 - 18 September 2018 through 21 September 2018

ER -

Process Integration and Reliability of Wafer Level SLID Bonding for Poly-Si TSV capped MEMS

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