Abstrakti

Chiplet-based CPUs, which combine multiple independent dies on a single package, allow hardware to scale to higher CPU core counts at the cost of more memory heterogeneity and performance variability. This introduces challenges when existing query engines are deployed on chiplet-based CPUs, as current designs make assumptions about uniform memory access, cache locality and consistent core performance,e.g., leading to in effective CPU utilization. In this paper, we analyse the performance impact when query engine sign orechiplet-specific properties. We demonstrate that a naïve deployment can result in significant degradation of query processing efficiency, exhibiting non-linear scaling even with in a single CPU socket domain. Based on comprehensive experiments, we explore approaches to deploy query engines on chiplet-based CPUs with improved performance: we show that distributing processing tasks according to achiplet-aware strategy achieves higher resource utilization and scalability, yielding an upto7×speedup compared to hardware-oblivious approaches.

AlkuperäiskieliEnglanti
Sivut3428-3441
Sivumäärä14
JulkaisuProceedings of the VLDB Endowment
Vuosikerta17
Numero11
DOI - pysyväislinkit
TilaJulkaistu - 2024
OKM-julkaisutyyppiA4 Artikkeli konferenssijulkaisussa
TapahtumaInternational Conference on Very Large Data Bases - Guangzhou, Kiina
Kesto: 24 elok. 202429 elok. 2024
Konferenssinumero: 50

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