Abstrakti
This paper presents the design of high-performance E-band single-pole double-through (SPDT) switch and low noise amplifier (LNA) as a part of transceiver front-end in an 0.13 μm SiGe BiCMOS technology. The quarter-wave shunt SPDT switch is designed using reverse-saturated SiGe HBTs. The resulting switch exhibits an insertion loss of 2.1 dB, isolation of 26 dB, reflection coefficient better than 18 dB at 75 GHz and provides a bandwidth of more than 35 GHz. The designed switch is integrated with a single-in differential-output (SIDO) low noise amplifier (LNA) and utilized as input matching element of the LNA. The LNA utilizes a common-emitter amplifier at the first stage and a casocode amplifier at the second stage to exploit the advantages of both common-emitter and cascode topologies. The resulting LNA with integrated switch achieves a gain and noise figure(NF) of 26 dB and 6.9 dB, respectively at 75 GHz with a 3 dB bandwidth of 12 GHz. Output referred 1-dB compression point of +5.5 dBm is achieved at 75 GHz. The designed integrated block consumes 45.5 mW of DC power and occupies an area of 720 μm × 580 μm excluding RF pads.
| Alkuperäiskieli | Englanti |
|---|---|
| Otsikko | Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), 2017 IEEE |
| Julkaisupaikka | Linkoping, Sweden |
| Kustantaja | IEEE |
| Sivumäärä | 5 |
| ISBN (elektroninen) | 978-1-5386-2844-7 |
| DOI - pysyväislinkit | |
| Tila | Julkaistu - 24 lokak. 2017 |
| OKM-julkaisutyyppi | A4 Artikkeli konferenssijulkaisuussa |
| Tapahtuma | IEEE Nordic Circuits and Systems Conference - Linkoping, Ruotsi Kesto: 23 lokak. 2017 → 25 lokak. 2017 |
Conference
| Conference | IEEE Nordic Circuits and Systems Conference |
|---|---|
| Lyhennettä | NORCAS |
| Maa/Alue | Ruotsi |
| Kaupunki | Linkoping |
| Ajanjakso | 23/10/2017 → 25/10/2017 |