Design of high-performance E-band SPDT switch and LNA in 0.13 μm SiGe BiCMOS technology

Raju Ahamed, Mikko Varonen, Dristy Parveg, Jan Saijets, Kari Halonen

Tutkimustuotos: Artikkeli kirjassa/konferenssijulkaisussaConference contributionScientificvertaisarvioitu

2 Sitaatiot (Scopus)
322 Lataukset (Pure)


This paper presents the design of high-performance E-band single-pole double-through (SPDT) switch and low noise amplifier (LNA) as a part of transceiver front-end in an 0.13 μm SiGe BiCMOS technology. The quarter-wave shunt SPDT switch is designed using reverse-saturated SiGe HBTs. The resulting switch exhibits an insertion loss of 2.1 dB, isolation of 26 dB, reflection coefficient better than 18 dB at 75 GHz and provides a bandwidth of more than 35 GHz. The designed switch is integrated with a single-in differential-output (SIDO) low noise amplifier (LNA) and utilized as input matching element of the LNA. The LNA utilizes a common-emitter amplifier at the first stage and a casocode amplifier at the second stage to exploit the advantages of both common-emitter and cascode topologies. The resulting LNA with integrated switch achieves a gain and noise figure(NF) of 26 dB and 6.9 dB, respectively at 75 GHz with a 3 dB bandwidth of 12 GHz. Output referred 1-dB compression point of +5.5 dBm is achieved at 75 GHz. The designed integrated block consumes 45.5 mW of DC power and occupies an area of 720 μm × 580 μm excluding RF pads.
Otsikko Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), 2017 IEEE
JulkaisupaikkaLinkoping, Sweden
ISBN (elektroninen)978-1-5386-2844-7
DOI - pysyväislinkit
TilaJulkaistu - 24 lokak. 2017
OKM-julkaisutyyppiA4 Artikkeli konferenssijulkaisuussa
TapahtumaIEEE Nordic Circuits and Systems Conference - Linkoping, Ruotsi
Kesto: 23 lokak. 201725 lokak. 2017


ConferenceIEEE Nordic Circuits and Systems Conference


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