TY - JOUR
T1 - An Impedance Source Multi-Level Three Phase Inverter with Common Mode Voltage Elimination and Dead Time Compensation
AU - Mahmoudian, Mehrdad
AU - Fakhraei, Maziyar
AU - Pouresmaeil, Edris
AU - Rodrigues, Eduardo M.G.
PY - 2020
Y1 - 2020
N2 - Currently, most electro-mechanical drive systems that require speed control use pulse-width modulated (PWM) variable frequency drives known as adjustable speed drives (ASD). The high switching speeds of the electronics switches are essential for proper operation of the ASD. Common mode voltage (CMV) has its origin in the PWM switching. The CMV increases the stress on the coils and windings, reduces the life of the bearing and, therefore, has a significant impact on motor life cycle. In this paper, a variant of a PWM-based space vector modulation (SVPWM) switching algorithm is proposed to control both the shoot-through intervals and the dead time of the power switches that could be compensated. The proposed algorithm is implemented on a platform consisting of an impedance source network in the DC side of the topology with the purpose of mitigating the CMV and capability of voltage boosting. Since similar methods have achieved a CMV reduction of 1/6 of the DC link voltage so far, in this paper, while surpassing the disturbing current harmonics, the high efficiency is fully accessible. The presented experimental results verify the effectiveness of the proposed approach by slightly increasing the total harmonic distortion (THD) and reducing the converter losses.
AB - Currently, most electro-mechanical drive systems that require speed control use pulse-width modulated (PWM) variable frequency drives known as adjustable speed drives (ASD). The high switching speeds of the electronics switches are essential for proper operation of the ASD. Common mode voltage (CMV) has its origin in the PWM switching. The CMV increases the stress on the coils and windings, reduces the life of the bearing and, therefore, has a significant impact on motor life cycle. In this paper, a variant of a PWM-based space vector modulation (SVPWM) switching algorithm is proposed to control both the shoot-through intervals and the dead time of the power switches that could be compensated. The proposed algorithm is implemented on a platform consisting of an impedance source network in the DC side of the topology with the purpose of mitigating the CMV and capability of voltage boosting. Since similar methods have achieved a CMV reduction of 1/6 of the DC link voltage so far, in this paper, while surpassing the disturbing current harmonics, the high efficiency is fully accessible. The presented experimental results verify the effectiveness of the proposed approach by slightly increasing the total harmonic distortion (THD) and reducing the converter losses.
KW - Commom-mode voltage
KW - CMV
KW - Adjustable speed drive
KW - ASD
KW - Three-level NPC inverter
UR - http://www.scopus.com/inward/record.url?scp=85092037060&partnerID=8YFLogxK
U2 - 10.3390/electronics9101639
DO - 10.3390/electronics9101639
M3 - Article
VL - 9
SP - 1639
EP - 1655
JO - Electronics
JF - Electronics
SN - 2079-9292
IS - 10
M1 - 1639
ER -