A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching

Faizan Ul Haq; Mikko Englund; Kari Stadius; Marko Kosunen; Jussi Ryynanen; Kimmo Koli; Kim B. Ostman

doi:10.1109/ISCAS.2017.8050249

A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching

Faizan Ul Haq, Mikko Englund, Kari Stadius, Marko Kosunen, Jussi Ryynanen, Kimmo Koli, Kim B. Ostman

Tutkimustuotos: Artikkeli kirjassa/konferenssijulkaisussa › Conference article in proceedings › Scientific › vertaisarvioitu

201 Lataukset (Pure)

Abstrakti

This paper presents a wideband blocker-tolerant Direct ΔΣ receiver (DDSR). Blockers are attenuated through selective input impedance matching and optimized gain design. The created impedance profile provides low receiver input impedance at blocker frequencies, while at desired frequencies, the impedance is boosted to matched condition through an up-converted positive feedback from the DDSR output. Receiver is evaluated in a 28nm fully-depleted silicon-on-insulator CMOS process with total power consumption of 25mW at 1V supply voltage. The receiver is designed for configurable operation from 0.7-2.7GHz, a baseband bandwidth of 10MHz, demonstrates a maximum noise figure of 6.2dB, and achieves a peak SNDR of 53dB with an out-of-band 1dB input compression point of -11.5dBm at 100MHz offset.

Alkuperäiskieli	Englanti
Otsikko	IEEE International Symposium on Circuits and Systems
Alaotsikko	From Dreams to Innovation, ISCAS 2017 - Conference Proceedings
Kustantaja	IEEE
Sivumäärä	4
ISBN (elektroninen)	9781467368520
DOI - pysyväislinkit	https://doi.org/10.1109/ISCAS.2017.8050249
Tila	Julkaistu - 25 syysk. 2017
OKM-julkaisutyyppi	A4 Artikkeli konferenssijulkaisussa
Tapahtuma	IEEE International Symposium on Circuits and Systems - Marriot Waterfront, Baltimore, Yhdysvallat Kesto: 28 toukok. 2017 → 31 toukok. 2017 http://ieeexplore.ieee.org/document/8050249/

Julkaisusarja

Nimi	IEEE International Symposium on Circuits and Systems proceedings
ISSN (elektroninen)	2379-447X

Conference

Conference	IEEE International Symposium on Circuits and Systems
Lyhennettä	ISCAS
Maa/Alue	Yhdysvallat
Kaupunki	Baltimore
Ajanjakso	28/05/2017 → 31/05/2017
www-osoite	http://ieeexplore.ieee.org/document/8050249/

Pääsy asiakirjaan

10.1109/ISCAS.2017.8050249

ELEC-UlHaq-et-al-ISCAS2017Accepted author manuscript, 360 KB

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Link to publication in Scopus

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Haq, F. U., Englund, M., Stadius, K., Kosunen, M., Ryynanen, J., Koli, K., & Ostman, K. B. (2017). A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching. teoksessa IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings Artikkeli 8050249 (IEEE International Symposium on Circuits and Systems proceedings). IEEE. https://doi.org/10.1109/ISCAS.2017.8050249

@inproceedings{c854e61479f2474e8d20406bbafa32e2,

title = "A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching",

abstract = "This paper presents a wideband blocker-tolerant Direct ΔΣ receiver (DDSR). Blockers are attenuated through selective input impedance matching and optimized gain design. The created impedance profile provides low receiver input impedance at blocker frequencies, while at desired frequencies, the impedance is boosted to matched condition through an up-converted positive feedback from the DDSR output. Receiver is evaluated in a 28nm fully-depleted silicon-on-insulator CMOS process with total power consumption of 25mW at 1V supply voltage. The receiver is designed for configurable operation from 0.7-2.7GHz, a baseband bandwidth of 10MHz, demonstrates a maximum noise figure of 6.2dB, and achieves a peak SNDR of 53dB with an out-of-band 1dB input compression point of -11.5dBm at 100MHz offset.",

author = "Haq, {Faizan Ul} and Mikko Englund and Kari Stadius and Marko Kosunen and Jussi Ryynanen and Kimmo Koli and Ostman, {Kim B.}",

year = "2017",

month = sep,

day = "25",

doi = "10.1109/ISCAS.2017.8050249",

language = "English",

series = "IEEE International Symposium on Circuits and Systems proceedings",

publisher = "IEEE",

booktitle = "IEEE International Symposium on Circuits and Systems",

address = "United States",

note = "IEEE International Symposium on Circuits and Systems , ISCAS ; Conference date: 28-05-2017 Through 31-05-2017",

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Haq, FU, Englund, M, Stadius, K , Kosunen, M , Ryynanen, J, Koli, K & Ostman, KB 2017, A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching. julkaisussa IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings., 8050249, IEEE International Symposium on Circuits and Systems proceedings, IEEE, IEEE International Symposium on Circuits and Systems , Baltimore, Maryland, Yhdysvallat, 28/05/2017. https://doi.org/10.1109/ISCAS.2017.8050249

A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching. / Haq, Faizan Ul; Englund, Mikko; Stadius, Kari et al.
IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. IEEE, 2017. 8050249 (IEEE International Symposium on Circuits and Systems proceedings).

Tutkimustuotos: Artikkeli kirjassa/konferenssijulkaisussa › Conference article in proceedings › Scientific › vertaisarvioitu

TY - GEN

T1 - A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching

AU - Haq, Faizan Ul

AU - Englund, Mikko

AU - Stadius, Kari

AU - Kosunen, Marko

AU - Ryynanen, Jussi

AU - Koli, Kimmo

AU - Ostman, Kim B.

PY - 2017/9/25

Y1 - 2017/9/25

N2 - This paper presents a wideband blocker-tolerant Direct ΔΣ receiver (DDSR). Blockers are attenuated through selective input impedance matching and optimized gain design. The created impedance profile provides low receiver input impedance at blocker frequencies, while at desired frequencies, the impedance is boosted to matched condition through an up-converted positive feedback from the DDSR output. Receiver is evaluated in a 28nm fully-depleted silicon-on-insulator CMOS process with total power consumption of 25mW at 1V supply voltage. The receiver is designed for configurable operation from 0.7-2.7GHz, a baseband bandwidth of 10MHz, demonstrates a maximum noise figure of 6.2dB, and achieves a peak SNDR of 53dB with an out-of-band 1dB input compression point of -11.5dBm at 100MHz offset.

AB - This paper presents a wideband blocker-tolerant Direct ΔΣ receiver (DDSR). Blockers are attenuated through selective input impedance matching and optimized gain design. The created impedance profile provides low receiver input impedance at blocker frequencies, while at desired frequencies, the impedance is boosted to matched condition through an up-converted positive feedback from the DDSR output. Receiver is evaluated in a 28nm fully-depleted silicon-on-insulator CMOS process with total power consumption of 25mW at 1V supply voltage. The receiver is designed for configurable operation from 0.7-2.7GHz, a baseband bandwidth of 10MHz, demonstrates a maximum noise figure of 6.2dB, and achieves a peak SNDR of 53dB with an out-of-band 1dB input compression point of -11.5dBm at 100MHz offset.

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M3 - Conference article in proceedings

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T3 - IEEE International Symposium on Circuits and Systems proceedings

BT - IEEE International Symposium on Circuits and Systems

PB - IEEE

T2 - IEEE International Symposium on Circuits and Systems

Y2 - 28 May 2017 through 31 May 2017

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Haq FU, Englund M, Stadius K , Kosunen M , Ryynanen J, Koli K et al. A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching. julkaisussa IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. IEEE. 2017. 8050249. (IEEE International Symposium on Circuits and Systems proceedings). doi: 10.1109/ISCAS.2017.8050249

A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching

Abstrakti

Julkaisusarja

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