TY - JOUR
T1 - A Comprehensive Survey on Delaunay Triangulation : Applications, Algorithms, and Implementations Over CPUs, GPUs, and FPGAs
AU - Elshakhs, Yahia S.
AU - Deliparaschos, Kyriakos M.
AU - Charalambous, Themistoklis
AU - Oliva, Gabriele
AU - Zolotas, Argyrios
N1 - Publisher Copyright: © 2013 IEEE.
PY - 2024/1/26
Y1 - 2024/1/26
N2 - Delaunay triangulation is an effective way to build a triangulation of a cloud of points, i.e., a partitioning of the points into simplices (triangles in 2D, tetrahedra in 3D, and so on), such that no two simplices overlap and every point in the set is a vertex of at least one simplex. Such a triangulation has been shown to have several interesting properties in terms of the structure of the simplices it constructs (e.g., maximising the minimum angle of the triangles in the bi-dimensional case) and has several critical applications in the contexts of computer graphics, computational geometry, mobile robotics or indoor localisation, to name a few application domains. This review paper revolves around three main pillars: (I) algorithms, (II) implementations over central processing units (CPUs), graphics processing units (GPUs), and field programmable gate arrays (FPGAs), and (III) applications. Specifically, the paper provides a comprehensive review of the main state-of-the-art algorithmic approaches to compute the Delaunay Triangulation. Subsequently, it delivers a critical review of implementations of Delaunay triangulation over CPUs, GPUs, and FPGAs. Finally, the paper covers a broad and multi-disciplinary range of possible applications of this technique.
AB - Delaunay triangulation is an effective way to build a triangulation of a cloud of points, i.e., a partitioning of the points into simplices (triangles in 2D, tetrahedra in 3D, and so on), such that no two simplices overlap and every point in the set is a vertex of at least one simplex. Such a triangulation has been shown to have several interesting properties in terms of the structure of the simplices it constructs (e.g., maximising the minimum angle of the triangles in the bi-dimensional case) and has several critical applications in the contexts of computer graphics, computational geometry, mobile robotics or indoor localisation, to name a few application domains. This review paper revolves around three main pillars: (I) algorithms, (II) implementations over central processing units (CPUs), graphics processing units (GPUs), and field programmable gate arrays (FPGAs), and (III) applications. Specifically, the paper provides a comprehensive review of the main state-of-the-art algorithmic approaches to compute the Delaunay Triangulation. Subsequently, it delivers a critical review of implementations of Delaunay triangulation over CPUs, GPUs, and FPGAs. Finally, the paper covers a broad and multi-disciplinary range of possible applications of this technique.
KW - algorithmic approaches to Delaunay triangulation
KW - applications of Delaunay triangulation
KW - CPU
KW - CPU implementation of Delaunay triangulation
KW - Delaunay triangulation
KW - FPGA
KW - FPGA implementation of Delaunay triangulation
KW - GPU
KW - GPU implementation of Delaunay triangulation
KW - Voronoi diagram
UR - http://www.scopus.com/inward/record.url?scp=85182928321&partnerID=8YFLogxK
U2 - 10.1109/ACCESS.2024.3354709
DO - 10.1109/ACCESS.2024.3354709
M3 - Article
AN - SCOPUS:85182928321
SN - 2169-3536
VL - 12
SP - 12562
EP - 12585
JO - IEEE Access
JF - IEEE Access
ER -