Description
Copper impurities are known to cause harmful light-induced degradation (Cu-LID) in p-type silicon, even when present in 1E10 cm-3 concentrations. Due to high diffusivity of copper, gettering is expected to be relatively simple as compared to slow-diffusing impurities. However, here it is shown that standard phosphorus gettering does not prevent the occurrence of Cu-LID. Specifically, time-temperature profiles of the device process steps as well as bulk micro defects present in the wafers play a critical role in the final gettering efficiency. For instance, a typical rapid thermal anneal (RTA, a few seconds at 800 ºC) is sufficient to release significant amount of Cu impurities from the phosphorus-doped layer to the wafer bulk in seemingly gettered wafers. We also demonstrate that copper can be present in significant concentrations in the bulk of the finished cells after being exposed to only trace surface contamination. Consequently, even a small local copper contamination area is sufficient to induce strong LID in the full-sized (6 inch) cell parameters, resulting e.g. in ~7% relative efficiency loss during illumination. The corresponding short circuit current density can decrease even 50% in the contaminated area. Finally, some recent results on Cu-LID mitigation are presented that seem to work nicely to LeTID defects too.| Aikajakso | 18 helmik. 2019 |
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| Pidetty | Solar Energy Research Institute of Singapore, Singapore |