Abstract
This paper presents an ultra-low power incremental (Formula presented.) ADC with flexible sampling frequency, accuracy, and operational duty-cycle. The flexibility and low leakage power enable efficient scaling of average power together with performance. This allows simultaneous optimization of the sensor system (1) for various multiplexed, both on-chip and off-chip sensor interfaces, and (2) for a wide range of available harvested energy. The architecture allows further flexibility as it can be used in regular continuous (Formula presented.) mode as well, without trading off accuracy. The ADC was implemented in a 180 nm CMOS process, on the same ASIC with a temperature sensor, pressure sensor and energy harvesting functionalities. The ADC has a nominal power consumption of (Formula presented.)W, SNDR of 68 dB and BW of 200 Hz, denoting a (Formula presented.) pJ/conv.
Original language | English |
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Pages (from-to) | 369-382 |
Number of pages | 14 |
Journal | Analog Integrated Circuits and Signal Processing |
Volume | 92 |
Issue number | 3 |
Early online date | 29 Jun 2017 |
DOIs | |
Publication status | Published - Sept 2017 |
MoE publication type | A1 Journal article-refereed |
Keywords
- Analog-to-digital
- Energy harvesting
- Incremental delta-sigma
- Sensor
- Ultra-low power