RF Input Matching Design for Closed-Loop Direct Delta–Sigma Receivers

Emerging digital-intensive receiver architectures require new methods for input matching design. In particular, closed-loop ∆Σ-based receivers inject discrete-time global feedback to the RF low-noise amplifier (LNA) output. When using feedback LNA topologies with local internal feedback, receiver input matching thus no longer depends only on analog LNA characteristics, but also on the transfer function of the full receiver chain. This paper proposes a systematic input matching design method for such receivers. We demonstrate how this method is applied to the recently introduced active direct delta–sigma receiver (DDSR). We also show that global ∆Σ feedback in the DDSR counteracts the effects of the local feedback of the LNA on receiver input impedance, and how this can be used to improve receiver performance. A generic DDSR input impedance model is thus developed to facilitate input matching design. The related design method does not require transistor-level description of the post-LNA blocks, but relies instead only on easily obtainable system-level properties. A design example and measurements of a 0.7–2.7-GHz DDSR in 40-nm CMOS verify a good match between the theoretical and experimental results.