Process Integration and Reliability of Wafer Level SLID Bonding for Poly-Si TSV capped MEMS

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Researchers

Research units

  • VTT Technical Research Centre of Finland

Abstract

The objective of this study was to develop a fully integrated process for wafer level MEMS packaging utilizing PolySi through silicon via (TSV) capped MEMS devices. First, interconnection metallurgy and Solid Liquid Interdiffusion (SLID) bonding process was optimized. Then sc.'vias before bonding' capping process and contact metallizations for Poly-Si TSVs were developed. Finally, the process integration was demonstrated by using piezoelectrically driven MEMSactuators. However, several design and manufacturing related challenges were observed and detailed failure analysis were carried out to resolve these problems.

Details

Original languageEnglish
Title of host publicationProceedings of the 2018 7th Electronic System-Integration Technology Conference, ESTC 2018
Publication statusPublished - 26 Nov 2018
MoE publication typeA4 Article in a conference publication
EventElectronic System Integration Technology Conference - Dresden, Germany
Duration: 18 Sep 201821 Sep 2018
Conference number: 7

Conference

ConferenceElectronic System Integration Technology Conference
Abbreviated titleESTC
CountryGermany
CityDresden
Period18/09/201821/09/2018

    Research areas

  • MEMS, Process integration, Reliability, Wafer level SLID bonding

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