Performance evaluation of classical differential rectifier by using forward body biasing technique

The growing usage of passive Radio frequency identification (RFID) tag has motivated research in its power supply design. The essential component of a power supply utilized in RFID is the rectifier which performs RF-to-DC conversion. In the implementation of rectifier, the conventional body bias technique is usually used where the body and source terminals of a transistor are tied together to achieve the zero bias threshold voltage value. In this work, an implementation of forward body biasing (FBB) scheme in the place of a conventional body biasing (CBB) technique in a rectifier is addressed. It has been found by using the post layout simulations that the FBB scheme is not only capable of extending the limits of the conventional differential rectifier in terms of load handling but also increases its RF signal sensitivity. In order to evaluate the performances of both architectures, the voltage conversion efficiency (VCE) and the power conversion efficiency (PCE) are selected as the figure of merits. The designs have been implemented in a standard 0.18 mu m CMOS technology and the simulations were done by using the Cadence spectre simulator at the RF frequency of 915 MHZ. The simulation results show improvement in PCE and VCE of the differential rectifier using FBB scheme when compared with the differential rectifier using CBB scheme.