Nonmonotone Norm-Reduction Method in Numerical Circuit Analysis

M. Honkala

    Research output: Working paperProfessional

    Original languageEnglish
    Place of PublicationEspoo
    Publication statusPublished - 2002
    MoE publication typeD4 Published development or research report or study

    Publication series

    NameCircuit Theory Laboratory Report Series
    PublisherHelsinki University of Technology, Circuit Theory Laboratory
    ISSN (Print)1455-9757


    • APLAC
    • circuit simulation
    • convergence
    • dc analysis
    • nonmonotone norm reduction
    • norm reduction

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