Leakage phenomena are increasingly affecting the performance of nanoelectronic devices, and therefore, advanced device simulators need to include them in an appropriate way. This paper presents the modeling and implementation of direct source-to-drain tunneling (S/D tunneling), gate leakage mechanisms (GLMs) accounting for both direct tunneling and trap-assisted tunneling, and nonlocal band-to-band tunneling (BTBT) phenomena in a multissubband ensemble Monte Carlo (MS-EMC) simulator along with their simultaneous application for the study of ultrascaled fully depleted silicon-on-insulator, double-gate silicon-on-insulator, and FinFET devices. We find that S/D tunneling is the prevalent phenomena for the three devices, and it is increasingly relevant for short-channel lengths.
- Band-to-band tunneling (BTBT)
- Direct source-to-drain tunneling (S/D tunneling)
- Double-gate silicon on insulator (DGSOI)
- Fully depleted silicon on insulator (FDSOI)
- Gate leakage current
- Multissubband ensemble Monte Carlo (MS-EMC)