MOSFET Level 3 Model in APLAC

M. Andersson, A. Kankkunen, M. Valtonen

    Research output: Working paperProfessional

    Original languageEnglish
    Place of PublicationEspoo
    Pages23
    Publication statusPublished - 1991
    MoE publication typeD4 Published development or research report or study

    Publication series

    NameCircuit Theory Laboratory Report Series
    PublisherHelsinki University of Technology, Circuit Theory Laboratory
    No.CT-9
    ISSN (Print)0784-5979

    Keywords

    • APLAC
    • circuit simulation
    • MOS modeling
    • MOSFET
    • Spice level 3

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