Models for the LE-FDTD Resistive Voltage Source Spanning Multiple Cells

L. Costa, K. Nikoskinen, M. Valtonen

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    Original languageEnglish
    Title of host publication2007 European Conference on Circuit Theory and Design Proceedings (ECCTD 2007), Sevilla, Spain, August 2007
    Place of PublicationSevilla, Spain
    Pages671-674
    Publication statusPublished - 2007
    MoE publication typeA4 Article in a conference publication

    Keywords

    • APLAC
    • array types
    • FDTD implementation,
    • nested loops
    • optimal loops

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