Model Based FPGA Design of Histogram Equalization

Research output: Contribution to journal › Article › Scientific › peer-review

Original language	English
Pages (from-to)	435-440
Journal	Sindh University Research Journal (Science Series)
Volume	48
Issue number	02
Publication status	Published - 2016
MoE publication type	A1 Journal article-refereed

Cite this

@article{1050c7ca937e4a03958ef9e2b42ae8d9,

title = "Model Based FPGA Design of Histogram Equalization",

author = "F. MEMON and F. JAMEEL and Muhammad Arif and MEMON, \{F. A.\}",

year = "2016",

language = "English",

volume = "48",

pages = "435--440",

journal = "Sindh University Research Journal (Science Series)",

issn = "1813-1743",

publisher = "University of Sindh",

number = "02",

}