Abstract
This thesis consists of six publications and an overview of the research topic. The overview concentrates on background information of the capacitive accelerometers and front-ends. The publications focus on two low-power front-ends that were implemented for capacitive three-axis accelerometers and their operation as a part of an interface. The switched-capacitor front-ends that were implemented are based on the charge-balancing structures, namely a self-balancing bridge and a ΔΣ front-end, which convert the capacitive acceleration information to analog and digital signals, respectively. Both structures operate mechanically in open-loop configuration and are capable of reducing the effects of the electrostatic forces and displacement-to-capacitance conversion. According to the performance comparison presented in this thesis, both interfaces, which were implemented around the front-ends, exhibit competitive performance when compared to the commercial products of the day.
Translated title of the contribution | Low-power front-ends for capacitive three-axis accelerometers |
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Original language | English |
Qualification | Doctor's degree |
Awarding Institution |
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Supervisors/Advisors |
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Publisher | |
Print ISBNs | 978-952-60-3418-8 |
Electronic ISBNs | 978-952-60-3419-5 |
Publication status | Published - 2010 |
MoE publication type | G5 Doctoral dissertation (article) |
Keywords
- capacitive three-axis accelerometer
- electrostatic forces
- front-end
- power consumption