Long term charge relaxation in silicon single electron transistors

A Savin*, A Manninen, P Kivinen, J Pekola, M Prunnila, J Ahopelto, M Kamp, M Emmerling, A Forchel

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Abstract

Silicon single electron transistors with a side gate have been fabricated on a heavily doped silicon-on-insulator substrate. I-V characteristics of all devices have a Coulomb blockade region. Electrical conductivity of single electron transistors demonstrates long term relaxation after cooling to 4.2 K, At temperatures below 20 K long-term relaxation of the source-drain current after switching of the gate voltage has been observed.

Original languageEnglish
Title of host publicationPhysics, Chemistry and Application of Nanostructures
Subtitle of host publicationReviews and Short Notes to NANOMEETING-2001
EditorsVE Borisenko, SV Gaponenko, VS Gurin
PublisherWorld Scientific Publishing Company
Pages466-469
Number of pages4
ISBN (Electronic)978-981-4491-06-8
ISBN (Print)978-981-02-4618-1
DOIs
Publication statusPublished - Apr 2001
MoE publication typeA4 Article in a conference publication
EventInternational Conference on Physics, Chemistry and Application of Nanostructures - Minsk, Belarus
Duration: 22 May 200125 May 2001

Conference

ConferenceInternational Conference on Physics, Chemistry and Application of Nanostructures
CountryBelarus
CityMinsk
Period22/05/200125/05/2001

Keywords

  • ROOM-TEMPERATURE
  • QUANTUM-DOT
  • MEMORY
  • GAIN

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