I-V curve hysteresis induced by gate-free charging of GaAs nanowires' surface oxide

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Research units

  • RAS - Ioffe Physico Technical Institute
  • Lappeenranta University of Technology
  • St. Petersburg National Research University of Information Technologies, Mechanics and Optics (ITMO)


The control of nanowire-based device performance requires knowledge about the transport of charge carriers and its limiting factors. We present the experimental and modeled results of a study of electrical properties of GaAs nanowires (NWs), considering their native oxide cover. Measurements of individual vertical NWs were performed by conductive atomic force microscopy (C-AFM). Experimental C-AFM observations with numerical simulations revealed the complex resistive behavior of NWs. A hysteresis of current-voltage characteristics of the p-doped NWs as-grown on substrates with different types of doping was registered. The emergence of hysteresis was explained by the trapping of majority carriers in the surface oxide layer near the reverse-biased barriers under the source-drain current. It was found that the accumulation of charge increases the current for highly doped p+-NWs on n+-substrates, while for moderately doped p-NWs on p+-substrates, charge accumulation decreases the current due to blocking of the conductive channel of NWs.


Original languageEnglish
Article number132104
JournalApplied Physics Letters
Issue number13
Publication statusPublished - 25 Sep 2017
MoE publication typeA1 Journal article-refereed

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