FPGA-Based Implementation of a 59-Neuron Feedforward Neutral Network with a 17.1 Gbps Interlayer Throughput

Antti Hämäläinen, Matti Tommiska, Jorma Skyttä

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Original languageEnglish
Title of host publicationInternational Conference on Artificial Intelligence,IC-AI´04, Las Vegas Nevada USA June 21-24,2004
Publication statusPublished - 2004
MoE publication typeA4 Article in a conference publication


  • FPGA
  • neutral networks

Cite this