Formal Verification of IEC 61499 Function Blocks with Abstract State Machines and SMV Modelling

Sandeep Patil; Victor Dubinin; Valeriy Vyatkin

Formal Verification of IEC 61499 Function Blocks with Abstract State Machines and SMV Modelling

Sandeep Patil, Victor Dubinin, Valeriy Vyatkin

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

18 Citations (Scopus)

Original language	English
Title of host publication	First International workshop on Distributed Intelligent Automation Systems at 13th IEEE International Symposium on Parallel and Distributed Processing with Applications (IEEE ISPA'15) Helsinki, 2015
Place of Publication	United States
Publication status	Published - 2015
MoE publication type	A4 Article in a conference publication

Publication series

Name
ISSN (Print)	2158-9178

Cite this

Patil, Sandeep ; Dubinin, Victor ; Vyatkin, Valeriy. / Formal Verification of IEC 61499 Function Blocks with Abstract State Machines and SMV Modelling. First International workshop on Distributed Intelligent Automation Systems at 13th IEEE International Symposium on Parallel and Distributed Processing with Applications (IEEE ISPA'15) Helsinki, 2015. United States, 2015.

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title = "Formal Verification of IEC 61499 Function Blocks with Abstract State Machines and SMV Modelling",

author = "Sandeep Patil and Victor Dubinin and Valeriy Vyatkin",

year = "2015",

language = "English",

isbn = "978-1-4673-8032-4",

booktitle = "First International workshop on Distributed Intelligent Automation Systems at 13th IEEE International Symposium on Parallel and Distributed Processing with Applications (IEEE ISPA'15) Helsinki, 2015",

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Formal Verification of IEC 61499 Function Blocks with Abstract State Machines and SMV Modelling. / Patil, Sandeep; Dubinin, Victor; Vyatkin, Valeriy.

First International workshop on Distributed Intelligent Automation Systems at 13th IEEE International Symposium on Parallel and Distributed Processing with Applications (IEEE ISPA'15) Helsinki, 2015. United States, 2015.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

TY - GEN

T1 - Formal Verification of IEC 61499 Function Blocks with Abstract State Machines and SMV Modelling

AU - Patil, Sandeep

AU - Dubinin, Victor

AU - Vyatkin, Valeriy

PY - 2015

Y1 - 2015

M3 - Conference contribution

SN - 978-1-4673-8032-4

BT - First International workshop on Distributed Intelligent Automation Systems at 13th IEEE International Symposium on Parallel and Distributed Processing with Applications (IEEE ISPA'15) Helsinki, 2015

CY - United States

ER -