Fabrication and characterization of graphene-based electronic devices

Graphene, a two-dimensional hexagonal carbon lattice, is a promising material for future electronics. High carrier mobility is viable through the two-dimensional plane and the true atomic thick layer enables to be transparency and flexiblility. The property is unique and never found before in other materials. A sp2-hybridized bonding in a lattice leads graphene to have physical strength that is about 100 times higher than steel. Its physical property is sustained while graphene is deformed. This is the reason why the graphene has been most attractive for electronics since it discovered in 2004. In this thesis, several different sources of graphene are introduced and investigated towards device applications. Among the sources ever known, graphene prepared on transition metal by chemical vapor deposition (CVD) is most popular since the method yields a uniform singlelayer without a size limit. For fast and cost-effective synthesis of graphene, photo-thermal CVD (PTCVD) was further developed by investigating the process conditions and parameters, such as, the flow rate of precursor gases, pressure, time, and temperature. Particularly, influence of growth temperature on the graphene quality was further examined. As a result, synthesis of high quality single-layer graphene was achieved on copper at 935-950 °C in about 60 s. The quality of graphene was preliminarily determined by scanning electron microscopy and Raman spectroscopy. Employing the CVD graphene, field-effect devices were fabricated and characterized at room temperature. With the control of the gate, highly tunable and switchable devices performing as a rectifier and an inverter were demonstrated. Remarkably, the device exhibiting full-wave rectification for 100 kHz of the AC input was presented utilizing three-terminal T-branch junction (TBJ). By applying the same CVD graphene layer to the gate electrode, transparent functionality through the device structure was additionally achieved. The experimental results are comparable to the previously reported TBJs having efficiency of 5-12% as the CVD graphene based TBJs shown here exhibits rectification with efficiency of 18%. As an inverter in the TBJ device, the highest voltage gain was observed to 2.4 at VD= 4 V. Finally, a cascaded two TBJ device structure where the output of the first TBJ was utilized as a gate input for thesecond TBJ was demonstrated. The output of the cascaded structure was displayed as clear rectification without any external gate. This is a significant step to realize the possibility of layer-by-layer device architecture for graphene-based monolithic integrated circuit, overcoming a zero-bandgap limit.