Efficient FPGA implementation of a complex matched filter for CPM timing recovery

A. Suihkonen, J. Vuori

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Original languageEnglish
Title of host publicationURSI/IEEE XXIV convention on radio science, Turku, 4-5 October 1999
Place of PublicationFinland
Pages122-123
Publication statusPublished - 1999
MoE publication typeA4 Article in a conference publication

Keywords

  • complex matched filter
  • digital logic
  • FPGA

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