Effects of back-gate bias on switched-capacitor DC-DC converters in UTBB FD-SOI

Matthew J. Turnquist, Guerric De Streel, David Bol, Markus Hiienkari, Lauri Koskinen

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    3 Citations (Scopus)

    Abstract

    This paper explores the effects of back-gate bias on switched-capacitor (SC) DC-DC converters in 28 nm UTBB FD-SOI. By using back-gate bias to optimize the control circuitry and switches, the SC converter can operate with a peak efficiency of 72% in sleep mode (100 nW load) and 83% in active mode (100 μW load).

    Original languageEnglish
    Title of host publication2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014
    PublisherIEEE
    ISBN (Electronic)9781479974382
    DOIs
    Publication statusPublished - 30 Jan 2014
    MoE publication typeA4 Article in a conference publication
    EventIEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference - Millbrae, United States
    Duration: 6 Oct 20149 Oct 2014
    http://s3sconference.org/

    Conference

    ConferenceIEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference
    Abbreviated titleS3S
    CountryUnited States
    CityMillbrae
    Period06/10/201409/10/2014
    Internet address

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