Digital-Intensive Transmitters and Power Amplifiers for Integrated Radio Systems

Research output: ThesisDoctoral ThesisCollection of Articles

Researchers

  • Mikko Martelius

Research units

Abstract

This dissertation presents research advancing theoretical and practical knowledge on digital-intensive integrated sub-6-GHz radio transmitters with special focus on power amplifiers (PAs). New radio standards and CMOS process scaling create demand for innovative solutions to push the digital-to-analog boundary closer to the antenna, while the goal of maximizing efficiency calls for transmitter architectures that enable using nonlinear switch-mode power amplifiers. This work explores the possibilities and limitations of integrated multilevel outphasing transmitters in this context, and develops new techniques to overcome shortcomings that were observed. These objectives are pursued with methods ranging from analysis and simulations to design, implementation and characterization of prototype circuits. The original research consists of three parts, the first of which focuses on system-level development of digital-intensive transmitters. This includes analysis of spectral degradation caused by discrete-time amplitude levels in polar and multilevel outphasing transmitters, which is shown to be canceled by a voltage-subtracting power combiner. In addition, it is demonstrated that discontinuities in harmonic content can limit the spectral performance of multilevel outphasing transmitters, and a new transmitter architecture called tri-phasing is proposed to eliminate the problem. Two integrated transmitter implementations in 28-nm CMOS are presented, one of which uses multilevel outphasing, while the other verifies the functionality of tri-phasing. The second part describes analysis and design of multilevel CMOS PAs intended for highly integrated transmitters. A cascoded class-D output stage complicates the task of switching PA units on and off during transmission, which is required by multilevel operation. This is solved with on/off logic that constructs the desired signal after biasing circuitry. This section presents the design of two eight-unit class-D PAs in 28-nm CMOS utilizing variations of the on/off logic. One of the PAs was implemented on the same die with other parts of the tri-phasing transmitter, constituting the highest achieved level of integration among multilevel outphasing-based transmitters. The final part of this work examines power combining with transmission-line-based circuits implemented on printed circuit boards. The presented analysis demonstrates that the choice of power-combiner type can be critical for suppressing detrimental voltage ripple at the supply and ground of a wire-bonded PA circuit. Two power combiners were designed for the presented PAs, the first of which uses a voltage-adding structure based on quarter-wave transmission lines. The second combiner design relies on the extended Marchand balun, a new coupled-line structure for voltage-subtracting combiners, which introduces an additional degree of freedom by including arbitrarily long input lines. The latter combiner was measured as part of the tri-phasing transmitter.

Details

Original languageEnglish
QualificationDoctor's degree
Awarding Institution
Supervisors/Advisors
Publisher
  • Aalto University
Print ISBNs978-952-60-8696-5
Electronic ISBNs978-952-60-8697-2
Publication statusPublished - 2019
MoE publication typeG5 Doctoral dissertation (article)

    Research areas

  • integrated circuits, radio transmitters, power amplifiers, power combiners, multilevel outphasing, tri-phasing

ID: 37538869