Design of Clock Generating Fully Integrated PLL Using Low Frequency Reference Signal

L. Aaltonen, M. Saukoski, K. Halonen

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    5 Citations (Scopus)
    Original languageEnglish
    Title of host publicationProceedings of the European Conference on Circuit Theory and Design ECCTD'05, 29 August2 September 2005
    Publication statusPublished - 2005
    MoE publication typeA4 Article in a conference publication


    • micromechanical
    • phase noise
    • PLL

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