Design of a D-Band CMOS Amplifier Utilizing Coupled Slow-Wave Coplanar Waveguides

Research output: Contribution to journalArticleScientificpeer-review

Researchers

Research units

  • VTT Technical Research Centre of Finland

Abstract

This paper validates a design and modeling methodology of coupled slow-wave waveguides (CS-CPW) by presenting a D-band CMOS low-noise amplifier (LNA) that utilizes the CS-CPW for impedance matching. The robustness and feasibility of using the CS-CPW as a matching element in wideband millimeter-wave (mm-wave) silicon circuit designs are studied. Furthermore, the key design details of a mm-wave LNA are discussed. The designed monolithic microwave integrated circuit amplifier has a gain greater than 10 dB from 135 to 170 GHz with a peak gain of 15.7 dB at 160 GHz. The amplifier has a measured noise figure of 8.5 dB from 135 to 170 GHz, and an output-referred 1-dB compression point of -16.5 dBm at 160 GHz. The total power consumption of the amplifier is 32 mW.

Details

Original languageEnglish
Pages (from-to)1359 - 1373
Number of pages15
JournalIEEE Transactions on Microwave Theory and Techniques
Volume66
Issue number3
Early online date14 Dec 2017
Publication statusPublished - 2018
MoE publication typeA1 Journal article-refereed

    Research areas

  • 140 GHz, 170 GHz, Amplifier, CMOS, CMOS technology, Coplanar waveguides, coupled slow-wave coplanar waveguide (CS-CPW), coupled transmission lines, D-band, Impedance, low-noise amplifier (LNA), Metals, millimeter wave integrated circuit, monolithic microwave integrated circuit (MMIC), Silicon, silicon, slow-wave coplanar waveguide (S-CPW), slow-wave coupled line, Strips, Substrates

ID: 17002862