Design considerations for direct delta-sigma receivers
Research output: Chapter in Book/Report/Conference proceeding › Chapter › Scientific › peer-review
- Dept. of Micro- and Nanosciences/SMARAD2
Modern CMOS technology development is driven by the needs of digital circuitry. Higher density, speed, and energy efficiency are obtained as minimum transistor sizes scale down with each new technology node. This trend also drives RF designs toward digital-type circuits that benefit from the scaling. All-digital phase-locked loops have been widely used in cellular synthesizers, and even more aggressive direct digital synthesis methods have been studied in academia. Likewise, transmitter demonstrations of power digital-to-analog converters (DACs) have pushed the boundary of digital signal processing to the power amplifier output node.
|Title of host publication||Wireless Transceiver Circuits|
|Subtitle of host publication||System Perspectives and Design Aspects|
|Publication status||Published - 1 Jan 2015|
|MoE publication type||A3 Part of a book or another research book|