Building blocks for fast circuit simulation

Modern electronic circuits are typically large, consisting of thousands of transistors and othercomponents. During the design process, there is a need to perform computationally demandingnumerical simulations to verify the functionality of the circuit. Thus, the need for fast andaccurate circuit simulation tools is obvious. Four approaches to improve the speed and the convergence of the numerical circuitsimulation are presented.The first approach utilizes efficient iteration methods for nonlinear DC analysis. Newton–Raphson (NR) iteration is the most used nonliner iteration method for nonlinearcircuit equations, but it lacks good global convergence properties. Some new variants ofnonlinear iteration methods are proposed to improve the convergence of DC analysis. In the second approach, the computing time is reduced by using parallel processing.Parallelization of harmonic balance (HB) analysis using multithreads is studied. Also, themodified multilevel NR method that has improved convergence properties is presented. The third approach concentrates on improving the convergence of iterative solvers for linearsystems using preconditioners. The emphasis is in the preconditioning of Jacobians of the HBmethod. It is shown how to use time-domain preconditioners with frequency-domainpreconditioners in order to benefit from both. The fourth approach to speed up the circuit simulation is to use model-order reduction(MOR), where the idea is to approximate complex circuit models with simpler ones. This thesisconcentrates on MOR methods for linear circuits or the linear parts of nonlinear circuits. Efficient partitioning-based MOR methods and a new global approach to projection-basedMOR are proposed.