BJT Model in APLAC

M. Andersson, M. Valtonen

    Research output: Working paperProfessional

    Original languageEnglish
    Place of PublicationEspoo
    Pages48
    Publication statusPublished - 1993
    MoE publication typeD4 Published development or research report or study

    Publication series

    NameCircuit Theory Laboratory Report Series
    PublisherHelsinki University of Technology, Circuit Theory Laboratory
    No.CT-17
    ISSN (Print)0784-5979

    Keywords

    • APLAC
    • bipolar transistors
    • BJT
    • CAD
    • CAE
    • modeling

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