An Efficient Piecewise-Linear DC Analysis Method for Circuits Containing Realistic Component Models

J. Roos; M. Valtonen

An Efficient Piecewise-Linear DC Analysis Method for Circuits Containing Realistic Component Models

J. Roos, M. Valtonen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

Original language	English
Title of host publication	ECCTD'97, Budapest, Hungary 30.8-3.9.1997
Place of Publication	Budapest
Publisher	European Circuit Society (ECS)
Pages	486-491
Publication status	Published - 1997
MoE publication type	A4 Article in a conference publication

Keywords

APLAC
DC analysis
nonlinear circuits
piecewise-linear

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Cite this

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title = "An Efficient Piecewise-Linear DC Analysis Method for Circuits Containing Realistic Component Models",

keywords = "APLAC, DC analysis, nonlinear circuits, piecewise-linear, APLAC, DC analysis, nonlinear circuits, piecewise-linear, APLAC, DC analysis, nonlinear circuits, piecewise-linear",

author = "J. Roos and M. Valtonen",

year = "1997",

language = "English",

pages = "486--491",

booktitle = "ECCTD'97, Budapest, Hungary 30.8-3.9.1997",

publisher = "European Circuit Society (ECS)",

address = "Denmark",

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TY - GEN

T1 - An Efficient Piecewise-Linear DC Analysis Method for Circuits Containing Realistic Component Models

AU - Roos, J.

AU - Valtonen, M.

PY - 1997

Y1 - 1997

KW - APLAC

KW - DC analysis

KW - nonlinear circuits

KW - piecewise-linear

KW - APLAC

KW - DC analysis

KW - nonlinear circuits

KW - piecewise-linear

KW - APLAC

KW - DC analysis

KW - nonlinear circuits

KW - piecewise-linear

M3 - Conference contribution

SP - 486

EP - 491

BT - ECCTD'97, Budapest, Hungary 30.8-3.9.1997

PB - European Circuit Society (ECS)

CY - Budapest

ER -