An Efficient New Systolic Architecture for the Solution of Discrete Fourier Transform

R. Baghaie, I. Hartimo

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Original languageEnglish
Title of host publicationIEEE Workshop on VLSI Signal Processing, Eindhoven, the Netherlands, October, 20-22,1993
Pages453-461
Publication statusPublished - 1993
MoE publication typeA4 Article in a conference publication

Keywords

  • 2-D DFT
  • systolic networks

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