An Approach for Customizing On-chip Interconnect Architectures in SoC Design

Chariete Abderrahim, Bakhouya Mohamed, Gaber Jaafar, Wack Maxime

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    6 Citations (Scopus)
    Original languageEnglish
    Title of host publicationInternational Conference on High Performance Computing and Simulation (HPCS), July 2 - 6, Madrid, Spain
    PublisherIEEE
    Pages288-294
    ISBN (Print)978-1-4673-2359-8
    Publication statusPublished - 2012
    MoE publication typeA4 Article in a conference publication

    Keywords

    • Customizing approaches
    • Design space exploration
    • Optimization algorithms
    • System-on-Chip

    Cite this

    Abderrahim, C., Mohamed, B., Jaafar, G., & Maxime, W. (2012). An Approach for Customizing On-chip Interconnect Architectures in SoC Design. In International Conference on High Performance Computing and Simulation (HPCS), July 2 - 6, Madrid, Spain (pp. 288-294). IEEE.