All-parylene flexible wafer-scale graphene thin film transistor

Maria Kim*, David M.A. Mackenzie, Wonjae Kim, Kirill Isakov, Harri Lipsanen

*Corresponding author for this work

Research output: Contribution to journalArticleScientificpeer-review

19 Citations (Scopus)
239 Downloads (Pure)

Abstract

Graphene is an ideal candidate as a component of flexible/wearable electronics due to its two-dimensional nature and low gate bias requirements for high quality devices. However, the proven methods for fabrication of graphene thin film transistors (TFTs) on fixed substrates involve using a sacrificial polymer layer to transfer graphene to a desired surface have led to mixed results for flexible devices. Here, by using the same polymer layer (parylene C) for both graphene transfer and the flexible substrate itself, we produced graphene TFTs on the wafer-scale requiring less than |2 V| gate bias and with high mechanical resilience of 30,000 bending cycles.

Original languageEnglish
Article number149410
Number of pages6
JournalApplied Surface Science
Volume551
DOIs
Publication statusPublished - 15 Jun 2021
MoE publication typeA1 Journal article-refereed

Keywords

  • Flexible electronics
  • Flexible gate dielectric
  • Graphene
  • Parylene C
  • TFT
  • Thin film transistor
  • Two-dimensional materials

Fingerprint

Dive into the research topics of 'All-parylene flexible wafer-scale graphene thin film transistor'. Together they form a unique fingerprint.

Cite this