Agile frequency synthesizer for cognitive radios

Liangge Xu*, Kari Stadius, Tapio Rapinoja, Jussi Ryynänen

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    1 Citation (Scopus)


    This paper describes an implementation of a frequency synthesizer for cognitive ratio application. The frequency synthesizer is based on all-digital phase locked loop, and employs adaptive frequency calibration for fast settling. Wide tuning range is achieved by using a ring oscillator with a band-extension technique. The frequency synthesizer is fabricated in a 65-nm CMOS process. It occupies an active area of 0.3 mm2 and has a power consumption less than 22 mW from a 1.2-V supply. Measured frequency tuning range is from 2.7 to 6.1 GHz. The measured phase noise level at 1-MHz offset is -90 dBc/Hz at 5.5-GHz output frequency.

    Original languageEnglish
    Title of host publicationECCTD 2009 - European Conference on Circuit Theory and Design Conference Program
    Number of pages4
    Publication statusPublished - 2009
    MoE publication typeA4 Article in a conference publication
    EventEuropean Conference on Circuit Theory and Design - Antalya, Turkey
    Duration: 23 Aug 200927 Aug 2009
    Conference number: 19


    ConferenceEuropean Conference on Circuit Theory and Design
    Abbreviated titleECCTD


    • ADPLL, DCO
    • AFC
    • cognitive radio
    • Fast settling
    • frequency synthesizer

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