A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching

Faizan Ul Haq, Mikko Englund, Kari Stadius, Marko Kosunen, Jussi Ryynanen, Kimmo Koli, Kim B. Ostman

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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Abstract

This paper presents a wideband blocker-tolerant Direct ΔΣ receiver (DDSR). Blockers are attenuated through selective input impedance matching and optimized gain design. The created impedance profile provides low receiver input impedance at blocker frequencies, while at desired frequencies, the impedance is boosted to matched condition through an up-converted positive feedback from the DDSR output. Receiver is evaluated in a 28nm fully-depleted silicon-on-insulator CMOS process with total power consumption of 25mW at 1V supply voltage. The receiver is designed for configurable operation from 0.7-2.7GHz, a baseband bandwidth of 10MHz, demonstrates a maximum noise figure of 6.2dB, and achieves a peak SNDR of 53dB with an out-of-band 1dB input compression point of -11.5dBm at 100MHz offset.

Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems
Subtitle of host publicationFrom Dreams to Innovation, ISCAS 2017 - Conference Proceedings
PublisherIEEE
Number of pages4
ISBN (Electronic)9781467368520
DOIs
Publication statusPublished - 25 Sept 2017
MoE publication typeA4 Conference publication
EventIEEE International Symposium on Circuits and Systems - Marriot Waterfront, Baltimore, United States
Duration: 28 May 201731 May 2017
http://ieeexplore.ieee.org/document/8050249/

Publication series

NameIEEE International Symposium on Circuits and Systems proceedings
ISSN (Electronic)2379-447X

Conference

ConferenceIEEE International Symposium on Circuits and Systems
Abbreviated titleISCAS
Country/TerritoryUnited States
CityBaltimore
Period28/05/201731/05/2017
Internet address

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