A Transmitter and receiver Interface Circuit Including an Equalizer and PFLL for 150Mbit/s Cable Communication

K. Koli, P. Ruhanen, K. Halonen

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    1 Citation (Scopus)
    Original languageEnglish
    Title of host publicationCustom Integrated Circuits Conference CICC'97, Santa Clara USA, 05-08 may 1997
    Pages315-318
    Publication statusPublished - 1997
    MoE publication typeA4 Article in a conference publication

    Keywords

    • interface circuit
    • PFLL

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