A Systematic Design Method for Direct Delta-Sigma Receivers

Research output: Contribution to journalArticleScientificpeer-review

Researchers

Research units

  • Nordic Semiconductor Oy
  • Huawei Technologies Oy

Abstract

Next generation receivers, such as the direct ΔΣ receiver (DDSR), shift the boundary between analog and digital closer to the antenna by merging the functionalities of different sub-blocks. In the DDSR, the analog components are used to their maximum potential as each stage participates in amplification, blocker filtering, anti-aliasing, and quantization noise shaping simultaneously, resulting in a compact design. To overcome the increased design complexity, the implemented DDSRs rely on common practices in receiver and ΔΣ modulator design. In this paper, we will show that the common design practices for neither receivers nor ΔΣ modulators yield optimal performance for the DDSR, and propose a systematic design method for gmC based DDSRs. The method enables improved performance and a straight-forward design flow by combining the gain partitioning, noise considerations, and loop-filter design. The developed method is demonstrated by designing a gmC based DDSR using a 28 nm FDSOI CMOS process. Simulations of the DDSR indicate state-of-the-art performance.

Details

Original languageEnglish
Pages (from-to)2389-2402
Number of pages14
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume65
Issue number8
Early online date8 Dec 2017
Publication statusPublished - Aug 2018
MoE publication typeA1 Journal article-refereed

    Research areas

  • analog-digital conversion, delta-sigma modulation, Design methodology, direct delta-sigma receiver., Gain, Logic gates, Modulation, Quantization (signal), Receivers, receivers, RF-to-digital converters, Systematics

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