A scheme to improve PCE of differential-drive CMOS rectifier for low RF input power

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A scheme to improve PCE of differential-drive CMOS rectifier for low RF input power. / Chang, Yuan; Chouhan, Shailesh Singh; Halonen, Kari.

In: Analog Integrated Circuits and Signal Processing , Vol. 90, No. 1, 01.2017, p. 113-124.

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@article{ca7e0d7f7b6245f2a3228e1502277ad8,
title = "A scheme to improve PCE of differential-drive CMOS rectifier for low RF input power",
abstract = "In this paper, a scheme to improve power conversion efficiency (PCE) of differential-drive CMOS rectifier for low RF input power is proposed. Auxiliary transistors are utilized to provide forward body biasing for the primary transistors of the rectifier. As a result, the threshold voltages of the primary transistors are reduced. Hence, higher PCE is achieved for lower RF input power. The circuits are designed in a standard 180 nm CMOS technology. Measurement results exhibit a considerable PCE improvement by the proposed design at the RF input frequency of 916 MHz in the three-stage configuration. For 50 K(Formula presented.) resistive load, the proposed rectifier has a maximum 10.9 {\%} PCE improvement and requires 2 dB less RF input power to achieve the comparable peak PCE.",
keywords = "CMOS rectifier, Differential-drive rectifier, Forward body biasing, Low RF input power, Power conversion efficiency",
author = "Yuan Chang and Chouhan, {Shailesh Singh} and Kari Halonen",
year = "2017",
month = "1",
doi = "10.1007/s10470-016-0825-y",
language = "English",
volume = "90",
pages = "113--124",
journal = "Analog Integrated Circuits and Signal Processing",
issn = "0925-1030",
number = "1",

}

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TY - JOUR

T1 - A scheme to improve PCE of differential-drive CMOS rectifier for low RF input power

AU - Chang, Yuan

AU - Chouhan, Shailesh Singh

AU - Halonen, Kari

PY - 2017/1

Y1 - 2017/1

N2 - In this paper, a scheme to improve power conversion efficiency (PCE) of differential-drive CMOS rectifier for low RF input power is proposed. Auxiliary transistors are utilized to provide forward body biasing for the primary transistors of the rectifier. As a result, the threshold voltages of the primary transistors are reduced. Hence, higher PCE is achieved for lower RF input power. The circuits are designed in a standard 180 nm CMOS technology. Measurement results exhibit a considerable PCE improvement by the proposed design at the RF input frequency of 916 MHz in the three-stage configuration. For 50 K(Formula presented.) resistive load, the proposed rectifier has a maximum 10.9 % PCE improvement and requires 2 dB less RF input power to achieve the comparable peak PCE.

AB - In this paper, a scheme to improve power conversion efficiency (PCE) of differential-drive CMOS rectifier for low RF input power is proposed. Auxiliary transistors are utilized to provide forward body biasing for the primary transistors of the rectifier. As a result, the threshold voltages of the primary transistors are reduced. Hence, higher PCE is achieved for lower RF input power. The circuits are designed in a standard 180 nm CMOS technology. Measurement results exhibit a considerable PCE improvement by the proposed design at the RF input frequency of 916 MHz in the three-stage configuration. For 50 K(Formula presented.) resistive load, the proposed rectifier has a maximum 10.9 % PCE improvement and requires 2 dB less RF input power to achieve the comparable peak PCE.

KW - CMOS rectifier

KW - Differential-drive rectifier

KW - Forward body biasing

KW - Low RF input power

KW - Power conversion efficiency

UR - http://www.scopus.com/inward/record.url?scp=84980028031&partnerID=8YFLogxK

U2 - 10.1007/s10470-016-0825-y

DO - 10.1007/s10470-016-0825-y

M3 - Article

VL - 90

SP - 113

EP - 124

JO - Analog Integrated Circuits and Signal Processing

JF - Analog Integrated Circuits and Signal Processing

SN - 0925-1030

IS - 1

ER -

ID: 6806825