A Scalable Low-Voltage Signaling (SLVS) Driver for a Low-Power MIPI M-PHY Serial Link in 40nm CMOS

Tero Nieminen, Olli Viitala, Martti Voutilainen, Jussi Ryynänen

Research output: Chapter in Book/Report/Conference proceedingConference contributionProfessional

Original languageEnglish
Title of host publication2012 8th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Aachen, Germany, 12-15 June 2012
EditorsIEEE Xplore
Pages1-4
ISBN (Electronic)978-3-8007-344-9
Publication statusPublished - 2012
MoE publication typeD3 Professional conference proceedings

Keywords

  • Clocks
  • CMOS integrated circuits
  • Latches
  • Noise
  • Power demand
  • Transient analysis

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