A Programmable 0.7-2.7 GHz Direct ΔΣ Receiver in 40 nm CMOS

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A Programmable 0.7-2.7 GHz Direct ΔΣ Receiver in 40 nm CMOS. / Englund, Mikko; Östman, Kim B.; Viitala, Olli; Kaltiokallio, Mikko; Stadius, Kari; Koli, Kimmo; Ryynänen, Jussi.

In: IEEE Journal of Solid-State Circuits, Vol. 50, No. 3, 7044615, 01.03.2015, p. 644-655.

Research output: Contribution to journalArticleScientificpeer-review

Harvard

Englund, M, Östman, KB, Viitala, O, Kaltiokallio, M, Stadius, K, Koli, K & Ryynänen, J 2015, 'A Programmable 0.7-2.7 GHz Direct ΔΣ Receiver in 40 nm CMOS', IEEE Journal of Solid-State Circuits, vol. 50, no. 3, 7044615, pp. 644-655. https://doi.org/10.1109/JSSC.2015.2397193

APA

Vancouver

Englund M, Östman KB, Viitala O, Kaltiokallio M, Stadius K, Koli K et al. A Programmable 0.7-2.7 GHz Direct ΔΣ Receiver in 40 nm CMOS. IEEE Journal of Solid-State Circuits. 2015 Mar 1;50(3):644-655. 7044615. https://doi.org/10.1109/JSSC.2015.2397193

Author

Englund, Mikko ; Östman, Kim B. ; Viitala, Olli ; Kaltiokallio, Mikko ; Stadius, Kari ; Koli, Kimmo ; Ryynänen, Jussi. / A Programmable 0.7-2.7 GHz Direct ΔΣ Receiver in 40 nm CMOS. In: IEEE Journal of Solid-State Circuits. 2015 ; Vol. 50, No. 3. pp. 644-655.

Bibtex - Download

@article{b5a4343db073468396adf3b76d3732ba,
title = "A Programmable 0.7-2.7 GHz Direct ΔΣ Receiver in 40 nm CMOS",
abstract = "This paper presents a wideband direct ΔΣ receiver for the 0.7-2.7 GHz frequency range. The architecture embeds a wideband direct-conversion RF front-end into a continuous-time feedback ΔΣ modulator, which initiates the analog-to-digital conversion of the selected channel already at the RF nodes. A feedback-type architecture enables simultaneous filtering of nearby interfering signals. The inductorless 40 nm CMOS receiver supports programmable ΔΣ modulator coefficients and RF channel bandwidths up to 20 MHz. The receiver consumes 90 mW from a 1.1 V supply, and it provides a peak SNDR of 46 dB, NF of 5.9-8.8 dB, and an IIP3 of -2 dBm.",
keywords = "Blocker filtering, continuous-time, delta-sigma modulation, direct conversion receivers, direct delta-sigma receiver, frequency-translating, N-path filtering, noise shaping, RF sampling, wideband",
author = "Mikko Englund and {\"O}stman, {Kim B.} and Olli Viitala and Mikko Kaltiokallio and Kari Stadius and Kimmo Koli and Jussi Ryyn{\"a}nen",
year = "2015",
month = "3",
day = "1",
doi = "10.1109/JSSC.2015.2397193",
language = "English",
volume = "50",
pages = "644--655",
journal = "IEEE Journal of Solid-State Circuits",
issn = "0018-9200",
publisher = "IEEE",
number = "3",

}

RIS - Download

TY - JOUR

T1 - A Programmable 0.7-2.7 GHz Direct ΔΣ Receiver in 40 nm CMOS

AU - Englund, Mikko

AU - Östman, Kim B.

AU - Viitala, Olli

AU - Kaltiokallio, Mikko

AU - Stadius, Kari

AU - Koli, Kimmo

AU - Ryynänen, Jussi

PY - 2015/3/1

Y1 - 2015/3/1

N2 - This paper presents a wideband direct ΔΣ receiver for the 0.7-2.7 GHz frequency range. The architecture embeds a wideband direct-conversion RF front-end into a continuous-time feedback ΔΣ modulator, which initiates the analog-to-digital conversion of the selected channel already at the RF nodes. A feedback-type architecture enables simultaneous filtering of nearby interfering signals. The inductorless 40 nm CMOS receiver supports programmable ΔΣ modulator coefficients and RF channel bandwidths up to 20 MHz. The receiver consumes 90 mW from a 1.1 V supply, and it provides a peak SNDR of 46 dB, NF of 5.9-8.8 dB, and an IIP3 of -2 dBm.

AB - This paper presents a wideband direct ΔΣ receiver for the 0.7-2.7 GHz frequency range. The architecture embeds a wideband direct-conversion RF front-end into a continuous-time feedback ΔΣ modulator, which initiates the analog-to-digital conversion of the selected channel already at the RF nodes. A feedback-type architecture enables simultaneous filtering of nearby interfering signals. The inductorless 40 nm CMOS receiver supports programmable ΔΣ modulator coefficients and RF channel bandwidths up to 20 MHz. The receiver consumes 90 mW from a 1.1 V supply, and it provides a peak SNDR of 46 dB, NF of 5.9-8.8 dB, and an IIP3 of -2 dBm.

KW - Blocker filtering

KW - continuous-time

KW - delta-sigma modulation

KW - direct conversion receivers

KW - direct delta-sigma receiver

KW - frequency-translating

KW - N-path filtering

KW - noise shaping

KW - RF sampling

KW - wideband

UR - http://www.scopus.com/inward/record.url?scp=84924336655&partnerID=8YFLogxK

U2 - 10.1109/JSSC.2015.2397193

DO - 10.1109/JSSC.2015.2397193

M3 - Article

VL - 50

SP - 644

EP - 655

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

SN - 0018-9200

IS - 3

M1 - 7044615

ER -

ID: 2005910