Abstract
This paper presents a wideband direct ΔΣ receiver for the 0.7-2.7 GHz frequency range. The architecture embeds a wideband direct-conversion RF front-end into a continuous-time feedback ΔΣ modulator, which initiates the analog-to-digital conversion of the selected channel already at the RF nodes. A feedback-type architecture enables simultaneous filtering of nearby interfering signals. The inductorless 40 nm CMOS receiver supports programmable ΔΣ modulator coefficients and RF channel bandwidths up to 20 MHz. The receiver consumes 90 mW from a 1.1 V supply, and it provides a peak SNDR of 46 dB, NF of 5.9-8.8 dB, and an IIP3 of -2 dBm.
Original language | English |
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Article number | 7044615 |
Pages (from-to) | 644-655 |
Number of pages | 12 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 50 |
Issue number | 3 |
DOIs | |
Publication status | Published - 1 Mar 2015 |
MoE publication type | A1 Journal article-refereed |
Keywords
- Blocker filtering
- continuous-time
- delta-sigma modulation
- direct conversion receivers
- direct delta-sigma receiver
- frequency-translating
- N-path filtering
- noise shaping
- RF sampling
- wideband