A digital frequency synthesizer for cognitive radio spectrum sensing applications

Tapio Rapinoja*, Kari Stadius, Liangge Xu, Saska Lindfors, Risto Kaunisto, Aarno Pärssinen, Jussi Ryynänen

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    4 Citations (Scopus)

    Abstract

    This paper presents a wide-band digital frequency synthesizer architecture targeted for spectrum sensing applications. The proposed digital period synthesizer (DPS) architecture can achieve wide operational bandwidth, extremely high frequency resolution and short settling time with low power and area consumption. The frequency synthesizer was implemented in a 65-nm CMOS process and it occupies 0.12 mm2 active area. The frequency range of the synthesizer is from 0.1 GHz to 4.267 GHz with 0.025-5.38 Hz frequency resolution. In this range, the settling time for any arbitrary frequency jump is less than 30 ns. The power consumption ranges from 3.6 to 8.4 mW.

    Original languageEnglish
    Title of host publicationDigest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
    Pages423-426
    Number of pages4
    DOIs
    Publication statusPublished - 2009
    MoE publication typeA4 Article in a conference publication
    EventIEEE Radio Frequency Integrated Circuits Symposium - Boston, United States
    Duration: 7 Jun 20099 Jun 2009

    Conference

    ConferenceIEEE Radio Frequency Integrated Circuits Symposium
    Abbreviated titleRFIC
    Country/TerritoryUnited States
    CityBoston
    Period07/06/200909/06/2009

    Keywords

    • Cognitive radio
    • Digital frequency synthesis
    • Spectrum sensing

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