Abstract
This paper describes a configurable hysteresis comparator for asynchronous sigma-delta modulators (ASDM). The proposed comparator provides coarse and fine tuning options for configuring the loop delay and hence the frequency of an ASDM. The post-layout simulation of the comparator implemented in a 28 nm FDSOI process shows that the comparator provides hysteresis voltage range of ±(1 to 15.3) mV while consuming 36.8 nW to 4.4 uW from 0.7 V supply, which enables configurable ASDM center-frequency in the range of 100 kHz to 6 MHz.
Original language | English |
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Title of host publication | 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) |
Publisher | IEEE |
Pages | 1-4 |
Number of pages | 4 |
ISBN (Electronic) | 978-1-5386-7656-1 |
ISBN (Print) | 978-1-5386-7657-8 |
DOIs | |
Publication status | Published - 13 Dec 2018 |
MoE publication type | A4 Conference publication |
Event | IEEE Nordic Circuits and Systems Conference - Tallinn, Estonia Duration: 30 Oct 2018 → 31 Oct 2018 |
Publication series
Name | IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) |
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Publisher | IEEE |
Conference
Conference | IEEE Nordic Circuits and Systems Conference |
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Abbreviated title | NORCAS |
Country/Territory | Estonia |
City | Tallinn |
Period | 30/10/2018 → 31/10/2018 |
Keywords
- configurable hysteresis, comparator, asynchronous, sigma-delta, modulator, ADC
- Hysteresis;Delays;Tuning;Frequency modulation;Transistors;Power demand, CMOS, Low Power
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Aalto Electronics-ICT
Ryynänen, J. (Manager)
Department of Electronics and NanoengineeringFacility/equipment: Facility