A 9-bit current-steering Digital to Analog Converter for differential dc-offset compensation of a baseband chain

Faizah Abu Bakar, Sohiful Anuar Zainol Murad, Rizalafande Che Ismail, Ville Saari, Kari Halonen

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Abstract

A current-steering Digital to Analog Converter (IDAC) to compensate dc-offset of a baseband chain in a Synthetic Aperture Radar (SAR) receiver is presented in this paper. The differential dc-offset can be injected with the current steer controlled by 9 digital control bits. The simulated LSB is 1.4 mV and the differential voltage range is 283 mV when it is connected to the baseband chain. This IDAC is implemented in a 130 nm CMOS technology and occupies 0.05 mm2 of silicon area. From the postlayout simulation of the IDAC, the voltage range satisfies the specification obtained from the Monte Carlo simulations of the baseband chain. The 1 Least Significant Bit (1LSB) of the IDAC ensure the dc-offset at the input of the following ADC met the system requirement.

Original languageEnglish
Title of host publication2014 IEEE Student Conference on Research and Development, SCOReD 2014
PublisherIEEE
ISBN (Electronic)978-1-4799-6428-4
DOIs
Publication statusPublished - 30 Mar 2014
MoE publication typeA4 Article in a conference publication
EventIEEE Student Conference on Research and Development - Penang, Malaysia
Duration: 16 Dec 201417 Dec 2014

Conference

ConferenceIEEE Student Conference on Research and Development
Abbreviated titleSCOReD
CountryMalaysia
CityPenang
Period16/12/201417/12/2014

Keywords

  • baseband chain
  • CMOS
  • IDAC
  • Monte Carlo simulation
  • SAR

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