A 5.4-GHz 2/3/4-modulus fractional frequency divider circuit in 28-nm CMOS

Tze Hin Cheung*, Jussi Ryynänen, Aarno Pärssinen, Kari Stadius

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Abstract

This paper describes the design and post-layout simulations of a 2/3/4- modulus frequency divider circuit, accompanied with an accumulator that controls the division count. The circuit is capable of operating as an integer or as a fractional divider. Key topic of this paper is the merging of div-2/3 and div-3/4 circuits into a single compact circuit that solves an issue of a forbidden state in fractional-division operation. The circuit is designed with 28-nm CMOS technology and the post-layout simulations indicate an operating input frequency range of 0.3 - 5.4 GHz with 13-bit fractional frequency resolution between division ratios of 2-4. The divider occupies only 40 µm x 30 µm while consuming 2.0 mW at 5.4 GHz input frequency.

Original languageEnglish
Title of host publication2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PublisherIEEE
ISBN (Electronic)9781728192017
DOIs
Publication statusPublished - 2021
MoE publication typeA4 Article in a conference publication
EventIEEE International Symposium on Circuits and Systems - Daegu, Korea, Republic of
Duration: 22 May 202128 May 2021
Conference number: 53

Publication series

NameIEEE International Symposium on Circuits and Systems proceedings
ISSN (Print)0271-4302
ISSN (Electronic)2158-1525

Conference

ConferenceIEEE International Symposium on Circuits and Systems
Abbreviated titleISCAS
CountryKorea, Republic of
CityDaegu
Period22/05/202128/05/2021

Keywords

  • CMOS
  • Frequency division
  • Frequency synthesis
  • RFIC

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