A 2.5-GHz 4.2-dB NF direct ΔΣ receiver with a frequency-translating integrator

Mikko Englund*, Kim B. Östman, Olli Viitala, Mikko Kaltiokallio, Kari Stadius, Jussi Ryynänen, Kimmo Koli

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

2 Citations (Scopus)


This paper presents a 2.5-GHz RF-to-digital converter implemented in a 40-nm CMOS technology. The architecture embeds a direct-conversion receiver RF front-end in a 1.5-bit continuous-time ΔΣ modulator loop. This allows simultaneous channel filtering and noise shaping that begins already in the RF stages. The implemented design pays particular attention to the frequency-translating interface at the LNA output, where a programmable impedance enables a tradeoff between receiver sensitivity and maximum SNDR. The receiver consumes 90 mW from 1.1 V, and achieves a state-of-the-art noise figure (NF) of 4.2 dB and 50-dB peak SNDR for a 15-MHz RF bandwidth.

Original languageEnglish
Title of host publicationESSCIRC 2014 - Proceedings of the 40th European Solid-State Circuit Conference
Number of pages4
ISBN (Print)9781479956944
Publication statusPublished - 31 Oct 2014
MoE publication typeA4 Conference publication
EventEuropean Solid-State Circuits Conference - Venezia Lido, Italy
Duration: 22 Sept 201426 Sept 2014
Conference number: 40


ConferenceEuropean Solid-State Circuits Conference
Abbreviated titleESSCIRC
CityVenezia Lido


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