A 240-MHz low-pass filter with variable gain in 65-nm CMOS for a UWB radio receiver

Ville Saari*, Mikko Kaltiokallio, Saska Lindfors, Jussi Ryynänen, Kari Halonen

*Corresponding author for this work

    Research output: Contribution to journalArticleScientificpeer-review

    38 Citations (Scopus)


    An integrated fifth-order continuous-time low-pass filter for a WiMedia ultrawideband radio receiver is described in this paper. The prototype filter is realized with a passive pole at the filter input and a fourth-order leapfrog filter in which the gm-C technique with pseudodifferential transconductors is used. The transconductors do not include internal nodes, and they are designed to have a nominal 26-dB dc gain, of which process, voltage, and temperature variations are controlled by means of a negative resistance circuit. The losses of the low-dc-gain filter integrators are already taken into account in the filter synthesis. The passband edge frequency of the implemented filter is 240 MHz in order to receive multiband-orthogonal-frequency-division -multiplexing signals using the direct-conversion topology. The voltage gain of the filter can be controlled from 9 to 43 dB in the 1-dB gain steps. The filter achieves a 7.8-√Hz input-referred noise density, a -8-dBV out-of-band third-order intermodulation intercept point, and a +15-dBV out-of-band second-order intermodulation intercept point. The circuit uses a 1.2-V supply and has been fabricated in a modern 65-nm CMOS technology.

    Original languageEnglish
    Pages (from-to)1488-1499
    Number of pages12
    Issue number7
    Publication statusPublished - 2009
    MoE publication typeA1 Journal article-refereed


    • Analog integrated circuits
    • CMOS
    • Continuous-time filters
    • Direct-conversion receiver


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