A 22-mA 3.0-dB NF direct conversion receiver for 3G WCDMA

J. Jussila, J. Ryynänen, K. Kivekäs, L. Sumanen, A. Pärssinen, K. Halonen

    Research output: Contribution to journalArticleScientificpeer-review

    29 Citations (Scopus)


    A 2-GHz single-chip direct conversion receiver achieves a 3.0-dB double-sideband noise figure, -14-dBm IIP3 and +17-dBm IIP2 with 60-mW power consumption from a 2.7-V supply. The receiver is targeted for the third generation UTRA/FDD WCDMA system. The low power consumption has been achieved with a proper partitioning and by avoiding buffering between blocks. In the differential RF front end, current boosted quadrature mixers follow the variable-gain low-noise amplifier. At the baseband, on-chip ac-coupled highpass filters are utilized to implement amplification with variable gain having small transients related to gain steps. The outputs of the analog channel selection filters are sampled directly by the two single-amplifier 6-bit pipeline A/D converters. The spurious tones due to the feedthrough of clock harmonics to the RF input increase the noise figure less than 0.1 dB. The receiver has been fabricated with a 0.35-μm 45-GHz f T SiGe BiCMOS process.

    Original languageEnglish
    Pages (from-to)2025-2029
    Number of pages5
    JournalIEEE Journal of Solid-State Circuits
    Issue number12
    Publication statusPublished - Dec 2001
    MoE publication typeA1 Journal article-refereed


    • Active filters
    • Analog-to-digital conversion
    • BiCMOS analog integrated circuits
    • Direct conversion
    • Gain control
    • Low-noise amplifiers
    • Mixers
    • Radio receivers


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